System architecture and FPGA embedding of compact fuzzy logic controller for arm robot joints

This research is about the system architecture for embedding of the Compact Fuzzy Logic Controller (Compact-FLC) into the FPGA with a minimal need in device resource. This exciting research is to minimize the FPGA resources needed to build Compact-FLC based on FPGA for controlling each joint of arm robot's manipulator. Compact-FLC results of this research have been used in the XILINX Spartan 3 XC3S1000 FPGA. The Compact-FLC has been applied with satisfactory results as Servo Controller for one joint of arm robot manipulator which the results showed that the controller achieved a process speed of 65,4uS, which is equivalent to a maximum sampling frequency of 15.290 KHz. Output membership function in this Compact-FLC used singleton membership function with Center Of Area algorithm. Two input membership functions, i.e E (Error) and CE (Change Error) have been used, both formed from several combination of triangular membership functions. The maximum number of fuzzysets that can be processed is sixteen. The overlapping function is not limited because there have been 256 if-then rule available as look up table in FPGA's ROM. The device utilization summary from ISE of XILINX development software gave the following data: Slice FlipFlops needed are 3869 or 25% of 15360 availability, 4 input LUT needed are 2319 or 15% of 15360 availability, Blocks of RAM needed are 4 or 16% of 24 availability, MULT18x18s needed are 2 or 8% of 24 availability, GCLKs needed are 2 or 25% of 8 availability, Bonded IOBs needed are 32 or 18% of 173 availability.